1. Technical Field
The present invention relates generally to electronic devices and in particular to calibration of electronic devices. Still more particularly, the present invention relates to a method, system, and electronic circuit for providing impedance calibration of electronic devices.
2. Description of the Related Art
Conventional HSS (high speed serializer/deserializer) standards require a transmitter have a differential output impedance in the range of 100 Ohms plus-or-minus (±)20% or better. The more accurate the output impedance (i.e., the smaller the percentage variance around the 100 Ohms), the better (more predictable and accurate) are the operating characteristics of the transmitter. Typically, the measured output impedance is provided by a resistor along with other circuit components (e.g., transistors), with measurable impedance characteristics. The resistor is frequently series-connected to the other components, which themselves may be either series or parallel connected to each other.
A source-series transmitter (SST) (or an inverter driver), is one example transmitter that is required to comply with this differential output impedance standard. With an SST, the output impedance typically consists of field effect transistor (FET) impedance in series with a resistor. FET impedance varies on the order of ±400% across different processes and allowable ASIC (application-specific integrated circuit) voltage variations. Thus, when the FET impedance represents a large enough portion of the overall output impedance, the (variable) FET impedance may easily cause the output impedance to fall out of the required range (i.e., ±20%) for differential output impedance.
The majority of voltage-mode transmitter implementations utilize very large FETs, which provide negligible FET impedance relative to the series connected resistor. These large FETs operate well at lower frequencies, but are not designed to handle the faster (high speed) transmission frequencies desired for current high speed applications (e.g., applications with transmission rates above 3 Gbps, non-return to zero (NRZ) data stream). Thus, smaller transistors, which support the higher speed rating are desired for most devices/applications currently being designed. These smaller transistors exhibit much larger impedances that may cause the circuit device to fall out of the desire range of output impedance.
Designing a transmitter that provides the output impedance characteristics while enabling the faster transmission rates via use of the smaller FETs requires some method of determining when the device being designed meets the requirements for the output impedance characteristics. A need therefore exists for an accurate, reliable process of calibrating a device, such as the transmitter, to meet particular output impedance requirements. This need is addressed by the present invention.